#ASIC

This project involves designing a 16-bit CORDIC (Coordinate Rotation Digital Computer) using Verilog, a hardware description language. · The design process transitions from…

Insights: This project is notable for its use of open-source tools and methodologies, making it accessible to independent hardware developers and small-scale innovators. · It serves as a…

OpenAI's Jalapeno ASIC chip outperforms NVIDIA's Blackwell chips by 1.5x to 1.9x in work per kilowatt, challenging NVIDIA's CUDA dominance. · The Jalapeno chip features a novel…

Insights: The Jalapeno ASIC is notable for its energy efficiency and performance, making it a game-changer in AI hardware, especially for power-conscious applications. · This technology is…

A challenging puzzle involving reverse engineering an ASIC, where participants are given the chip's final mask layout and must deduce its netlist and functionality. · The task…

Insights: This project is notable for its educational value, offering a hands-on experience in reverse engineering and circuit analysis, appealing to both hobbyists and professionals. · It…

EnSilica has secured a €1.7 million contract for the second phase of a satellite payload communications ASIC program. · The contract is awarded by a European satellite…

Insights: This contract underscores the growing demand for specialized ASICs in the aerospace sector, highlighting opportunities for innovation in satellite communications. · For Tindie…